Why DFM pays for itself
A design-for-manufacture review catches the errors that turn into scraps, field returns and respin cost. None of it is glamorous; all of it is cheaper before the panel is cut. Run this list while the board is still in the tool.
Key takeaways
- Most re-spins trace back to annular ring, trace/space and solder-mask rules ignored at design — DFM catches them free.
- Impedance and thermal relief are the two rules that decide whether the board works, not just whether it builds.
- Adding fiducials and test points before fabrication is what makes automated test possible later.
- A 1-hour DFM review typically saves a 2-week re-spin.
| Check | Rule | Why it matters |
|---|---|---|
| Annular ring | ≥0.1 mm | Prevents drill breakout |
| Trace / space | ≥3/3 mil (4/4 std) | Reliable etching |
| Via aspect ratio | ≤10:1 | Plated via integrity |
| Solder-mask dam | ≥0.1 mm | Prevents bridging |
| Silkscreen clearance | ≥0.15 mm from pads | Readable, no shorts |
| Component spacing | ≥0.2 mm | Pick-and-place access |
| Thermal relief | On plane pads | Solderability |
| Impedance | Modeled stack | Signal integrity |
| Fiducials | ≥2 global | AOI / placement |
| Panelization | Add rails | Handling |
| Test points | ≥0.3 mm | ICT access |
| Copper balance | Symmetrical | Warpage control |
Stack-up and copper
- Annular ring: keep ≥0.15 mm on vias you actually need to hit; below that, expect occasional tangency.
- Trace/space: match the shop's capability (typically 0.1 mm for standard, 0.075 mm for fine). Don't design to the limit unless you must.
- Copper balance: on multilayer, balance copper per layer to avoid warp.
Drilling and vias
- Aspect ratio: keep hole depth ≤ ~8× diameter for reliable plating.
- Via-in-pad: cap or fill it; an open via under a BGA ball traps solder.
- Non-plated holes: call them out explicitly or they will be plated by default.
Assembly readiness
- Solder mask dams: between fine-pitch pads, or bridges follow.
- Silkscreen: keep it off pads and keep text ≥0.8 mm tall.
- Test points: leave a few exposed pads for flying-probe ICT.
- Fiducials: add global and panel fiducials for the placer.
Close the loop
Hand the checklist to your CM at RFQ. We return a DFM report with the exact items above flagged on your gerbers — see our prototyping service for how fast that turnaround is. Send the files and we will review before you pay for a panel.
